PowerCalcLab

Electronics calculator

Voltage Divider Calculator

Calculate more than the ideal R2 ÷ (R1 + R2) ratio. Add source and load resistance to see the real output shift, branch currents, output impedance and resistor dissipation.

The input resistance of the circuit connected to the divider output.

Advanced assumptions

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Loaded output voltage5.714 V

Calculation breakdown

Ideal unloaded outputIgnores source resistance and load6 V
Source-aware unloaded output6 V
Loading errorRelative to the source-aware unloaded voltage-4.76%
Source/divider current0.629 mA
Load current0.057 mA
Divider output resistance5 kΩ
R1 powerEntered resistor rating passes3.951 mW
R2 powerEntered resistor rating passes3.265 mW
Vout = Vin × (R2 ∥ Rload) ÷ (Rsource + R1 + R2 ∥ Rload)
= 12 × (10 kΩ ∥ 100 kΩ) ÷ (0 kΩ + 10 kΩ + 10 kΩ ∥ 100 kΩ)
= 5.714 V
  • A resistive divider is a signal or reference network, not a regulated power supply. Output voltage changes with load and input voltage.
  • Lower resistance reduces loading error but increases divider current and resistor dissipation. Higher resistance saves power but raises output impedance and sensitivity to leakage or bias current.

Before you rely on this

Do not use a resistive divider as a substitute for an isolated, regulated or current-capable power supply. Observe component voltage and power ratings.

Method

How the number is reached

For the unloaded ideal divider, output is input voltage multiplied by R2 divided by R1 + R2. Source resistance appears in series with R1.

When a load is connected, it appears in parallel with R2. That smaller effective lower resistance changes the ratio, raises source current and produces a loading error relative to the unloaded output.

The output resistance is the Thevenin resistance seen at the divider node with the ideal voltage source shorted: (Rsource + R1) in parallel with R2.

Unloaded: Vout = Vin × R2 ÷ (Rsource + R1 + R2)
Loaded lower resistance: Reff = R2 ∥ Rload
Loaded: Vout = Vin × Reff ÷ (Rsource + R1 + Reff)
Resistor power: P = I²R or V²/R

Symbols

R1
Upper resistor from source to output node
R2
Lower resistor from output node to reference/ground
∥
Parallel resistance

Worked examples

The same maths, applied

Example

12 V divided by two 10 kΩ resistors with a 100 kΩ load

The source resistance is zero and the output load is 100 kΩ.

Unloaded output = 12 × 10 ÷ (10 + 10) = 6 V
Effective lower resistance = 10 kΩ ∥ 100 kΩ = 9.091 kΩ
Loaded output = 12 × 9.091 ÷ (10 + 9.091) = 5.714 V
Loading error = (5.714 − 6) ÷ 6 = −4.76%

Result: 5.714 V loaded output.

Limits of the model

What it assumes, and where it stops

Assumptions

DC steady state, ideal resistors and a purely resistive source and load.

Not covered

Does not model resistor tolerance, temperature coefficient, input bias/leakage, capacitance, noise, transient response or AC frequency behavior.

Sources

Where these figures come from

  • Understanding Basic Analog — Circuit EquationsTexas InstrumentsManufacturer application note deriving the unloaded voltage-divider rule and explaining that a fixed load must be combined in parallel with the lower resistor.
  • SI UnitsNIST Office of Weights and MeasuresDefinitions of the volt, ampere, watt and joule used for the unit conventions on this site.

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Last meaningful update: 2026-08-19. This date changes only when the model, the sources or the guidance change.